1. Field of the Invention
The invention relates to an adapter card for connection to a data bus in a data processing unit. The invention furthermore relates to a method for operating a DDR memory module in different test modes.
2. Description of the Related Art
Test modes of memory chips are functionalities which can be utilized for testing the chips more efficiently or for improved error analysis. These functionalities cannot readily be called up by the user of the memory chips since the functions and the corresponding activation commands for these test modes are not intended to be accessible and in this respect are typically not published by the manufacturer of the memory chips. For example, test modes may serve to vary specific on-chip voltages that are generated to lengthen or to shorten delay times which influence the on-chip sequence control of the memory logic and other operations.
These test modes are usually activated only during the testing of the memory chips in test or analysis systems. In the actual application of the memory chips, an activation of the test modes is not actually envisaged, and the memory controllers provided for driving the memory chips in the later application usually do not afford a possibility for generating the command data for activating a test mode. Generally, the command data are intentionally made so complex that a random or inadvertent activation of a test mode in the later application is practically impossible.
In some instances, for memory chips that have been identified as free of errors in the course of testing after chip production, errors may still occur in subsequent application of the chips. This is due to the fact that, on the test systems, it is not readily possible to model every situation which can occur in a later application. Therefore, the ability to activate the test modes while the memory chip is in the application offers a significant aid for determining the cause of the error that has occurred.
The document DE 100 07 177 A1 discloses a method which makes it possible to set a test mode for a memory chip in a data processing unit. The memory chips can be put into a test mode in a targeted manner with the aid of suitable software and the command data for test mode activation being provided in a memory situated on an additional plug-in card. Said data are then retrieved by a program executed in the data processing unit. After the activation of the selected test mode by means of the code stored in the additional memory, a defined return is made to the calling program.
With the aid of such a method, it is possible to put the memory chip in SDR technology (single data rate technology) in a later application into a test mode and to continue to operate the application. Known methods cannot, however, be applied to memory systems with DDR technology (double data rate technology). Thus, it is usually not possible, by means of the customary controller chips for DDR memory chips, to simultaneously generate any arbitrary information on the address bus when a mode register set command is applied on the command bus. However, since the individual test modes in DDR technology are called up via a combination between a mode register set command on the command bus and a corresponding information item, identifying the specific test mode function, on the address bus, a call-up of test modes in DDR memory chips used in a conventional data processing unit with a customary memory controller by means of the data processing unit itself is not possible. Consequently, the method according to the prior art cannot be used for the activation of test modes in the case of DDR memory chips.